Home Partner Profiles Intento Design: building EDA for error-free chips

Intento Design: building EDA for error-free chips

Intento Design was founded in Spring 2015 to provide responsive technology for analog intellectual property (IP) following 25 years of research and development in analog design methodology at Laboratoire d’Informatique de Paris 6 (LIP6) at Université Pierre et Marie Curie (UPMC) in Paris, France.

The research resulted in an extensive Intento Design portfolio of intellectual property, including an innovative electronic design automation (EDA) tool that accelerates the design cycle by automating the sizing and migration of analog and mixed-signal circuitry used in complex system-on-a-chip circuits (SoCs) for a variety of advanced technology nodes.. The EDA tool, ID-Xplore™ guarantees the generation of error-free chips.

Intento Design and the internet of things

By the year 2020 there will be more than 212 billion wireless sensor enabled objects:

  • Consumer: Smartphones, tablets, digital cameras, wearables;
  • Internet of Things (IoT): Automotive, home automation, industrial;
  • Big Data: Cloud infrastructure, Access points, routers;
  • Military: Defence, aerospace; and
  • Medical: Implantable devices, monitoring, dosing.

Making these applications a reality means higher integration of analog and mixed-signal circuitry, while achieving the perfect balance of performance, low power consumption, portability and ruggedness. As companies strive to meet these expectations, many design teams are running up against a productivity gap, putting them at risk of missing shrinking time to market windows.

Solving the Productivity Gap

The Intento Design methodology solves the productivity gap inherent in the analog design process by reducing lengthy simulation iterations.

Traditionally, analog and mixed-signal design requires the engineer to compute initial circuit dimensions from hand analysis using first order transistor models followed by successive simulations. This tedious and time-consuming process can take weeks for a complex circuit. Intento Design accelerates this process with software that plugs into the existing design flows and standard tools, and automates the circuit sizing, thereby allowing designers to move on to layout, placement and routing in a fraction of the time.

The Intento Design methodology also keeps the designer at the centre of the process by:

  • selecting the specifications that must be met by the circuit;
  • reviewing the trade-offs among desired power consumption, performance and surface area; and
  • selecting one or several optimum solutions.
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AREAS OF EXPERTISE
  • innovative circuit topologies;
  • fast, technology-independent analog design;
  • EDA innovation;
  • performance capabilities.
RESEARCH INTERESTS
  • disruptive innovation;
  • rapid, specification driven DC bias and transistor sizing;
  • fast design space exploration in any technology.

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